1. Field of the Invention
The present invention generally relates to a semiconductor device, and more particularly relates to a semiconductor device which has the power supply wiring to supply power to a circuit part of a semiconductor chip via a power-supply line of the semiconductor chip.
2. Description of the Related Art
Conventionally, in the semiconductor device in which the semiconductor chip is mounted using the wire bonding method, the electrode at the peripheral part of the semiconductor chip carried on the substrate and the bonding lead on the substrate are electrically connected together by a wire etc.
At the time of operation, the power supply current is supplied from the electrode of the peripheral part of the semiconductor chip to the circuit part in the center of the semiconductor chip through the power-supply line.
FIG. 1 shows the composition of the conventional semiconductor device 10. The semiconductor chip 1, such as LSI, is carried on the interposer used as the substrate indicated by the dotted line in FIG. 1. The semiconductor chip 1 comprises the core part 5 which forms the circuit part, the plurality of electrode pads 2 disposed at the peripheral part of the core part 5, and the power-supply line 4.
The electrode pad 2 disposed for the power supply, among the plurality of electrode pads 2, is connected by the circuit part and the power-supply line 4 of the semiconductor chip 1. The electrode pad 2 disposed for the grounding, among the plurality of electrode pads 2, is connected by the circuit part and the power-supply line 4 of the semiconductor chip 1.
The power supply current from the power supply (not illustrated) is supplied at the time of operation to the circuit of the core part 5 in the center of the semiconductor chip 1 through the power-supply line 4 from the periphery of the semiconductor chip 1.
On the substrate of the semiconductor device 1, the plurality of bonding leads 7 are disposed in the region encircling the semiconductor chip 1. Among the plurality of bonding leads 7, the bonding lead 7 for the power supply is connected to the power supply (not illustrated), and the bonding lead 7 for the grounding among the plurality of bonding leads 7 is grounded. All the bonding leads 7 provided on the substrate are electrically bonded to the electrode pads 2 at the periphery of the semiconductor chip 1 by the wires 8.
As the known method concerning the power supply wiring of the semiconductor device, Japanese Laid-Open Patent Application No. 03-008360 discloses the power supply wiring provided in the semiconductor device having the plurality of wiring layers. This semiconductor device has the wiring structure in which the plurality of semiconductor chips and the power supply wiring are connected via the through holes.
Moreover, Japanese Laid-Open Patent Application No. 64-089447 discloses the semiconductor integrated circuit device having the multilayer interconnection structure. In order to avoid the influence from the electric field and the magnetic field on the exterior of the integrated circuit, the semiconductor circuit device is configured to have the wiring structure in which at least one conductor layer among the plurality of conductor layers is connected to the power supply or the ground so as to cover entirely the periphery of the element (transistor) on the substrate.
In the conventional semiconductor device 10 of FIG. 1, the power supply current is supplied to the core part 5 of the semiconductor chip 1 via the power-supply line 4 at the time of operation. However, there is a tendency that the supply voltage in the center of the core part 5 falls to be lower than the supply voltage at the peripheral part of the core part 5.
Especially, at the time of high-speed operation, the power supply current is consumed with the passive component parts, such as resistors and inductors, and the supply voltage in the center of the core part 5 will be lower than the supply voltage in the peripheral part of the core part 5. There may arise the problem in which the predetermined operation cannot be performed by the circuit part of the semiconductor chip 1 due to the supply voltage drop. Therefore, in the case of the conventional semiconductor device 10, the supply voltage drop becomes the cause of the operational fault of the semiconductor chip 1.